Altium inverted pin. This allows subsequent pin swap data to be passed between projects in a pain-free, efficient fashion. Connect this termination circuit to the appropriate pin in the schematic. Jun 14, 2017 · Properties. Inverted-F antennas, in general, have narrow bandwidths. A polygon pour is a group design object - that Mar 16, 2023 · Tech Consultant Zach Peterson returns with Part Two of his exploration of Inverted-F Antennas. 17. Remember that you may also need to tune the placement as you route. Before updating the schematic, right-click on the schematic file and click ‘Compile Document’. Make Altium Designer a necessity for every PCB designer – the world's greatest and most elegant design experience. Also referred to as copper pours, polygon pours are used to fill irregularly-shaped areas of a board, automatically pouring around existing objects and connecting only to objects on the same net as the polygon pour. To complete this component, place a single pad as an input at feedline entry on the antenna that matches the pin on the schematic symbol. Nov 15, 2022 · There are 3 major themes to come in Altium Designer 2023. Sep 1, 2021 · Photo-Silicon-Controlled rectifiers. The pin groups for the entire component are set up in the Configure Pin Swapping dialog, as shown in the Jan 26, 2023 · PlacePin. Information can now be found here: Reviewing & Editing Split Planes for version 24. Select the component footprint in the workspace and enable the Enable Pin Swapping option, using either the PCB Inspector or PCB List panels. The color of a blind vias or buried vias will identify its start and stop layer. In the Footprint Name field of the Component dialog, type in the Dec 12, 2023 · To validate the project focused in the Projects panel, you can also use the Validate Project command from the right-click menu of the project's entry or the control at the top of the panel. The software checks for logical, electrical, and drafting errors between the Jan 3, 2018 · Unfortunately, if you do that wrong, there are only three "quick" fixes and that all require twisting the cable through 180 degrees on its way to the target. Run the Net Label tool. In order to make the name go inside the rectangle I have to set the margin to -600mil . Nov 10, 2020 · The purpose of terminations is to remove this energy once the voltage waveform has been delivered. To access the silkscreen preparation tool from the PCB editor, use the Tools » Silkscreen Preparation command from the main menus. Click the Add button to add a new pin, then Mar 21, 2017 · Clearance Constraint: (32. Jun 5, 2015 · This page details the PCB Editor's Un-Connected Pin design rule - which detects pins that have no net assigned and no connecting tracks. While laying down graphics within the workspace, a properties panel accesses elegant menus able to refine and customize special Nov 21, 2022 · A smaller alternative may be a printed microstrip antenna, such as a printed trace antenna or an inverted F antenna. Silkscreen size: As a general rule, your silkscreen markings should be no smaller than 40 mil text Jan 19, 2024 · Controlled Impedance routing is all about configuring the dimensions of the routes and the properties of the board materials to deliver a specific impedance. Figure 4 illustrates transmission line termination techniques that might be used and how these terminations are connected to a transmission line. The Pin Model Editor dialog. be/j3MgdCoAoiU👉 15 Days Free Altium Designer Access: https:/ Jul 18, 2017 · The Symbol Wizard dialog is accessed by selecting Tools » Symbol Wizard from the main menus in a Schematic Library document. Jul 22, 2009 · In Eagle PCB you just put an exclamation in front of the signal, or around the part to have the overline, like !RST or !TST!/GPO. Make the necessary changes and click OK. Share. Shift+F4. Cycle backward to the previous open tabbed document, making it the active document in the design space. Sometimes, I use that canned function when I create schematic symbol/pins like inverted, input, output, etc but in your (Schmitt trigger) case I just create my own dumb graphic symbol (in the schematic library editor) that I can scale it to Schematic Components – Pin Name Abbreviations. The Automatic Pin/Net Optimizer first runs a fast single-pass optimizer that attempts to minimize cross overs and connection lengths, but may actually increase them. Altium pin swapping relies on the fact that nets of two different physical pins can be swapped without having any negative impact on the electrical functionality of the design. Aug 29, 2019 · How can I make the pin name to be adjacent to the "Active X" mark on the pin? In earlier version of Altium it was default. Second, the remaining energy in the EM field is inverted by this high to low impedance change and reflected back down the transmission line toward the load end. Project Setup: When using the DAVE tool for a new project, the first step is creating a new project file using the “File -> New -> DAVE Project” command sequence. Created: July 28, 2015 | Updated: June 19, 2017 | Applies to versions: 15. May 14, 2018 · The Component Pin Editor dialog can be accessed from either the schematic editor or the schematic library editor by performing the following steps: Double-click on the desired placed component (or right-click then choose Properties from the context menu) to open the Properties panel in Component mode. This IC makes it very easy to negotiate different voltage and current requirements within the USB PD protocol and does not require much configuration and external circuitry. Dec 13, 2017 · Choose Place » String from the main menus. Now reading version 17. The Pin Mapper dialog contains the following parts (see image labels): Shows the file name and path of the source FPGA/MC pin file. A crosshair with a text label will be attached to the cursor. Here V. (Click and hold an Active Bar button to access other related commands. Rule category: Electrical. 0 and 15. 3 - Net Label is ready to be placed. Not only must there be an identical number of pins between graphical display modes, the pins must be also identical in both Designator Jul 27, 2015 · Access the Library Component Properties dialog by clicking Tools » Component Properties. Delete the component that generated the Unknown Pin from the PCB. Once a command has been used, it will become the topmost item on that section of the Active Bar ). Collaboration and teamwork. Oct 26, 2016 · Here is at least one way to do it: Place a rectangular cutout in your polygon pour. The integrated routing command uses pin swapping information available within the project. Rather than selecting the active low graphical pin style, active low pins should be designated using a bar above the pin name. Silk-to-silk clearance. Nov 8, 2017 · After placement, the Image mode of the Properties panel can be accessed in one of the following ways: Double-click on the placed image object. Jan 31, 2013 · It seems like the op had an install problem. Here on the 555 timer schematic it is perfect. Sep 13, 2017 · Figure 3. For Altium Designer, each letter that needs an overline should be suffixed with a backslash, e. Schematic Library Editor - double-click on the Jan 11, 2018 · A component pin is swappable with another pin in that component when it belongs to the same pin group (has the same pin group value). Returns all text string (comment, designator, free) objects that have a Inverted Rectangle Jan 11, 2018 · A component pin is swappable with another pin in that component when it belongs to the same pin group (has the same pin group value). Blind vias span from a surface layer to an internal layer and terminate at a landing pad. Fix 1: Remake the cables so you have to twist them correctly. The pad can then connect to another trace Jun 14, 2017 · Select the object in the Primitive List to reveal its options on the right. Fearing a full re-install was at hand, it turned out to be enough to run the installer (Add or Remove Programs, right click Alitum, uninstall) and select "Remove Preferences". Highlight the image in Microsoft Word and copy it to the clipboard. Feb 21, 2017 · PCB Layout with Many Crossover Connections. This provides a cleaner look for the schematic. Click the Add button to add a new pin, then define the properties in the dialog. This document is no longer available beyond version 21. acitve low) write signal. are being defined using the Advanced mode Aug 3, 2020 · The Electrical Rules Check Setup dialog contains three tabs, each of which are described on this page. It becomes an abomination if the text on the pin is also labeled ~WR~, because the bubble on the pin “inverted” the signal back to “normal”. This extension is installed by default, but if it is inadvertently uninstalled Jul 8, 2015 · 2. Alternatively, double-click the entry for the component in the Components region of the SCH Library panel or select the entry and click the Edit button. Also known as photo-SCRs, they provide complete isolation of noise and voltage transients present on the AC power supply line. Nov 19, 2022 · Patch antennas are simple to design on the surface layer of a PCB and they obey two simple design rules: Patch antennas are placed over a ground plane, and the ground plane should extend well beyond the edges of the antenna. It is an abstract connection that enables the logical grouping of different signals including buses, wires and other signal harnesses for increased flexibility and streamlined design. Electrical - Un-Connected Pin. R\S\T\. Designator - the numerical identifier of the pin. Post-placement settings – all Net Label object properties are available for editing in the Properties panel when a placed Net Label is selected in the workspace. But as you see, it screws up the whole alignment. Pins can also be added through the Component Pin Editor dialog, which is accessed by clicking the button on the Pins tab of the Properties panel in Component mode. While you could argue about the percentage of each, it is generally accepted that good component placement is critical for good board design. A laser is used to ablate the copper on the outer layer as well as the insulating material between layers 1 and 2. For better handling of differential pairs while interactively routing, integrated pin (subnet) swapping on the fly has been introduced. Now you can either: Import the IBIS pin models into the component pins during Signal Integrity Analysis (to be stored as Altium Designer SI Macro Models), or Jan 5, 2023 · Exit Altium Designer. Jan 9, 2020 · There are several types of vias used in PCBs: Through-hole vias span across the entire PCB stackup and can connect to any layer. Cite. 36mil < 34mil) Between Split Plane (GND) on Internal Plane 1 And Split Plane (NetC6) on Internal Plane 1. On the Pins tab of the panel, select a pin Jan 4, 2020 · First, the arriving signal is divided down by the ratio of the two impedances. These PCB vias will have a pad on each layer where a connection is a made to a trace. For the latest, read: PlacePin for version 21. 0, offering up to 100 watts of power delivery (sink only). Name - use to specify an optional display name for the pin. In this case, the clearance value of 34mil has been entered in the Region - Region cell, as clearances. Sep 13, 2017 · With the PCB document active, pin swapping tools are available from the Tools » Pin/Part Swapping sub-menu. There are two types of lasers used in this process: Mar 8, 2021 · The Wire label ~WR~ indicates to the net that it is active low, and the inverting bubble on the pin also indicates that the chip accepts some inverted (cq. The component footprint defines the space and connection points Nov 3, 2023 · We will focus on the Infineon CYPD3177, a USB Type-C PD controller capable of supporting USB PD 3. Sep 4, 2023 · Inverted-F PCB Antenna Basic Design Structure and Function. Click the Net Label button ( ) in the graphic objects drop-down on the Active Bar located at the top of the design space. Short them with a Copper Region in between. F4. g. 1, 16. On the Pins tab of the panel, click . For instance, a two pin Net Tie component may be represented to look like a piece of wire in a schematic sheet (totally hiding its existence). Drop the rectangle over the cutout making sure that it overlaps completely. Use the dialog to configure the settings of the silkscreen object clipping/movement. PrjPcb and click on the ‘Compile PCB Project’. Right-click in the Project. Figure 2: Pin Net Tie Schematic Symbols. Clearance checking between split plane regions on an internal layer. These are series and parallel. Shift+Ctrl+Tab. The Harness Design functionality allows you to Apr 27, 2020 · Altium Designer will display blind vias and buried vias with a split color on them so that you can easily tell which layer the via starts and stops on. In this installment, he focuses on how to create the CAD data Rather than selecting the active low graphical pin style, active low pins should be designated using a bar above the pin name. 1. The pin groups for the entire component are set up in the Configure Pin Swapping dialog, as shown in the Dec 20, 2017 · The graphic for a Net Tie component is arbitrary and in some cases unnecessary. For example, if you're routing towards a FPGA IO pin that can be swapped with other IO pins in Feb 24, 2023 · Inverted-F antenna as a component footprint created with copper fills. Information can now be found here: Schematic Pin Object for version 24. Nov 30, 2023 · The Harness Design functionality allows engineers of various types (involved in the Product Design process) to work in Altium Designer. Aug 2, 2022 · AsMM(InvertedRectangleWidth) Between 6 And 8. Add one or more pins in the Component Pin Editor dialog. , with a shielded cable. In case of a pin name where only a part of it is active low, and hence, not all of it needs a bar above, e. Open the required target PCB document in Altium Designer. Mar 16, 2023 · Tech Consultant Zach Peterson returns with Part Two of his exploration of Inverted-F Antennas. Created: March 17, 2022 | Updated: March 18, 2022 | Applies to version: 21. For Enterprise Pin Swapping - How-To. The features available depend on your Altium product access level. Schematic symbols can be created directly in your connected Workspace: Select File » New » Library from the main menus, then in the New Library dialog that opens, select Create Library Content » Symbol from the Workspace region of the dialog. 0 Revision 2. If the Properties panel is already active, select the image object. To meet modern design requirements, PCB antenna simulation software provides the antenna's Dec 28, 2017 · I believe (in Altium) it is not possible to move (or scale) a pin's symbol type on a schematic symbol either during creation or as an edit after creation. Select Tools » Pin/Part Swapping » Automatic Pin/Net Optimizer from the PCB editor menu to perform an automatic optimization. The width of a patch antenna is sized to support a standing wave resonance between the patch and the ground plane. The dialog can only be accessed if the Schematic symbol generation tool extension is installed as part of your Altium Designer installation. 6 LS0001 (v1. Cycle forward to the next open tabbed document, making it the active document in the design space. This basically flips it 180 degrees. Place the cursor over the image object then right-click then choose Properties from the context menu. Create your text string on the target copper layer using "Inverted" and "Use inverted Rectangle" check boxes. If the Configure Pin Swapping dialog was accessed from the Configure Swapping Information In Components dialog, you will return to that dialog. By highlighting the pin that you want to modify you can toggle the visibility of the pin number and the reference indicator or name. Aug 25, 2017 · In general, there are three clearance rules you should define for your silkscreen to ensure you comply with standard DFA requirements: Silk-to-copper clearance (assuming SMD features) Silk-to-soldermask opening clearance. To access the Variant Manager, right-click the project entry in the Projects panel and select Variants or choose Project » Variants from the main menus of the schematic or PCB editor. There are two line termination types. 19 it is the opposite. Use the dialog's right-click menu to quickly assign pins to Pin Groups. Paste the image from the clipboard ( Edit » Paste, or Ctrl+V ). A basic example would be the two pins of a resistor. You invoke the interactive swap capabilities using Tools > Pin/Part Swapping, according to interactive pin swap selections you have made. Signal Harnesses allow for the creation and manipulation of higher level abstract connections between sub Jul 10, 2017 · The Component Pin Editor dialog can be accessed from either the schematic editor or the schematic library editor by performing the following steps: Double-click on the desired placed component (or right-click then choose Properties from the context menu) to open the Properties panel in Component mode. 2) March 19, 2004. To place a line above the pin text, add curly brackets {} around the name, and prefix with the (~) character. If it is not long enough, either press Tab while moving the Jumper, or double-click once it is placed, to open the Component dialog. Mar 17, 2022 · Ver:21. In addition to enabling pin swapping, you must also specify the method (s Apr 7, 2017 · To complete them, the Jumper components will be used. The current variant is displayed in bold, white text. To open the Layer Stack Manager, select Design » Layer Stack Manager from the main menus. To complete a connection with a Jumper: Drag a jumper component into position on the board. Default is a simple vector font which supports pen plotting and vector photoplotting; Sans Serif and Serif fonts are more complex and will slow Mar 25, 2024 · There is a saying that PCB design is 90% placement and 10% routing. Pads are assigned at the two legs of the antenna. Feb 24, 2017 · Why Switch to Altium See why and how to switch to Altium from other PCB design tools; Solutions. Validate your design using the Validate PCB Project <ProjectName> command. Feb 10, 2017 · PERFORMING THE PIN OR PART SWAPS. pcblib opened, place two pads in a footprint. Then, in the new component, we place a rectangle. Covers constraints and application Electrical - Un-Connected Pin | Altium Designer 17. Create a new Workspace Symbol using the New Library dialog. By placing the rectangle for the component body first, it will save us having to move it behind the pins later, it just saves a little time. Use or to determine whether the Designator for the pin is displayed or hidden (respectively) when the parent part is placed on a schematic sheet. Created: February 24, 2017 . Apr 9, 2021 · A Signal Harness is an electrical design primitive. Each pin in a part must have a unique designator. The chosen settings can be stricter or more lenient than the settings defined in the Project Options dialog. Oct 16, 2019 · Laser Drilled Blind Vias: These are created after all of the layers in a PCB have been laminated and before the outer layer has been etched and plated. Sep 13, 2017 · Access the properties dialog for the PCB component footprint. Integrated Pin Swapping. The software also assists with PCB antenna design by displaying metal-dielectric layers, feeds, and connector types. First, we will look at the process of creating a negative or “Internal” plane within our Altium plane layers. Stroke - Select Stroke Font, three Stroke-based fonts are available. May 10, 2024 · In order to short two different Nets in the design, the primary approach is to create a Net Tie Component. I am a long time Altium user and one day X,Y (and even TAB) stopped working as expected. Fix 2: Move the right angle connector to the back of the board. To access the Mar 22, 2021 · Applying a thermal relief pad to a specific SMD pad or through-hole pin based in the pad/pin properties. Jun 5, 2015 · An extra pin has been added to the display that is not specified in the Normal display mode, or; A pin has been specified with a different Designator and/or Name to a pin specified in the Normal display mode. Then wire the component up in a schematic just like you would other components. Toggle the display of all floating panels. Sep 25, 2018 · Here are some of the primary functions of ground in electronics: Ground provides a reference point that is used to measure voltages. 0 and 17. Aug 2, 2019 · The Automatic Pin/Net Optimizer is a two-stage tool. 1 Technical Documentation Nov 10, 2020 · Altium Designer provides easy access to predefined or customizable special strings for placement in PCB layout. Add a string to the top layer (TrueType - Inverted) and complete the pad shape with anything else (like fills, lines, pads). In this installment, he focuses on how to create the CAD data Oct 21, 2020 · Differential pairs are generally immune to ground offsets and do not require the grounds on each side of a differential link to be bridge, e. Apr 9, 2020 · PCB antenna design software accurately analyzes the filters, microstrip lines, and passive components that make up a PCB antenna. One of these points can be defined as "0 V", and it just so happens that we call this 0 V reference a "ground". Press Tab to pause net label placement. The pin groups for the entire component are set up in the Configure Pin Swapping dialog, as shown in the Watch our full deep dive on how to reverse engineer a PCB from Gerber files here: https://youtu. You can create a new PCB component. Ground offsets are only a problem in single-ended signaling as a ground offset will modify the signal level in the board. The pads, silkscreen, and assembly information will appear on the opposite side of the PCB. An Inverted-f antenna consists of a monopole antenna running parallel to a ground plane and grounded at one end. Make sure that the copper Region just extends to the sides of the pad but not to the snap point in the middle of the pad itself. In the Swapping Options region, enable the Enable Pin Swaps option. Let’s label several nets. A wider bandwidth can be achieved by Apr 11, 2024 · The Variant Manager is a document-based user interface that allows you to view, create, and manage design variants of your PCB design project. Click the String button () in the drop-down on the Active Bar located at the top of the workspace. This document is no longer available beyond version 17. In the picture above you have a thru-hole via on the left with a solid colored core. You’ll never find it in the Designer notes unless you know to look for backslash. Multi-board systems and harness design – empower PCB designers and electrical engineers to design harnesses. The Net Label default settings in the Preferences dialog and the Net Label mode of the Properties panel. Apr 9, 2021 · Net labels are available for placement in the Schematic Editor only in the following ways: Choose Place » Net Label from the main menus. Jan 12, 2024 · Creating a New Schematic Symbol. All voltages are defined in terms of the electric field (and potential energy) between two points. The inverted-F is used in some popular MCU boards or modules, for example the ESP32 Ai-Thinker module shown below. Select the named compiled tab located at the bottom of the schematic sheet. Two nanoseconds later, at T 4, it arrives at the load end and appears inverted. Once all Pin Groups have been defined as required, click OK to commit the changes to the schematic component. InvertedRectangleWidth <> 550. Mar 24, 2023 · To modify pin models, click the Add/Edit Model button in the Signal Integrity Model dialog if this button is available for that type. This action will bring up a new window where you can select the “DAVE CE Project” option and give it an appropriate name. 1 and 17. Edit the size width/height to be slightly larger than your cutout. To label the net, start the Net Label placement tool () located in the Active Bar or Place > Net Label in the main menus. Figure 3: A Net Tie footprint Possibly Used To Short Two Polygons Of Differing Net Sep 13, 2017 · This feature was exended in Altium Designer 15, with the addition of support for using attached IBIS models with Altium Designer's own internal Signal Integrity analysis engine. If you use the design rules, you will always have the option to manually apply Jun 29, 2015 · A component pin is swappable with another pin in that component when it belongs to the same pin group (has the same pin group value). Sep 13, 2017 · Use Inverted Rectangle - Check this box to control over the bounding rectangle for the text, including justification and margins. 0. Dec 31, 2019 · The first thing we’ll do in Altium is to create a new schematic library by going to File -> New -> Library -> Schematic Library. Inverted-F microstrip antenna on the ESP32 Ai-Thinker module. Dec 12, 2017 · Adding Pins in the Component Pin Editor. The Layer Stack Manager opens in a document Jul 30, 2020 · Polygon pours are used to create a solid or hatched (lattice) area on a PCB layer. The Pin Model Editor dialog displays. Ctrl+Tab. Fig. Information can now be found here: Un-Connected Pin Rule for version 24. The design rule system and query system in Altium Designer allows you to mix and match these approaches for different types of components or groups of components. The first thing to do when creating an internal plane is to add a design layer specifically for the plane. Aug 7, 2017 · An extra pin has been added to the display that is not specified in the Normal display mode, or; A pin has been specified with a different Designator and/or Name to a pin specified in the Normal display mode. This is done in the PCB editor's Layer Stack Manager. Parent page: Schematic Commands. You can reset the settings of your Electrical Rules Check to the same as your project options by clicking Set To Project Default. Silkscreen size: As a general rule, your silkscreen markings should be no smaller than 40 mil text Mar 24, 2023 · The Signal Integrity Analyzer finds the source schematic document that the pin belongs to. Jun 8, 2017 · The Component Pin Editor dialog is accessible from both the Schematic Editor and the Schematic Library Editor: Schematic Editor - double-click on the required placed component to access the Properties for Schematic Component dialog, then click the Edit Pins button at the bottom-left of the dialog. Oct 27, 2022 · Refer to Creating a PCB Footprint. Normal NORM Playback PB Not Connected NC Point PT Not To Be Connected DNU Polarity POL Number NUM Position POS Power * PWR P Octal OCT Power Fail Input PFI Offset OS Power Fail Output PFO Off-Time TOFF Power Ground PGND Op Amp OPA Power On Reset POR Operating OP Aug 25, 2017 · In general, there are three clearance rules you should define for your silkscreen to ensure you comply with standard DFA requirements: Silk-to-copper clearance (assuming SMD features) Silk-to-soldermask opening clearance. Altium Designer Documentation Retired Documentation Design Rules. Created: July 27, 2015 | Updated: April 11, 2017 | Applies to versions: 15. With *. Jan 18, 2024 · Step-by-Step Coding Guide. Not only must there be an identical number of pins between graphical display modes, the pins must be identical in both Designator and Name. After launching the command, the Silkscreen Preparation dialog will open. 1, 17. If you don’t see a discussed feature in your software, contact Altium Sales to find out more. To flip a component to the opposite layer of the PCB, select the component and drag it, and press the "L" key. Jul 27, 2015 · PlacePin. Then, in a free space on the document, it will add the necessary parts with the correct values (resistors, capacitors or whatever is required) and the power objects. Aug 17, 2018 · This can be done by highlighting the component and clicking on the Properties tab at the top right of the *. 0, 16. Jul 28, 2015 · Internal Plane Information. After these steps, if there is no error, you can update your schematic. It is advisable to have the linked FPGA and PCB projects fully synchronized prior to performing any pin swapping operations on the PCB. Returns all text string (comment, designator, free) objects that have a Inverted Rectangle Width property which is greater than or equal to 6mm and less than or equal to 8mm. SchDoc window, as shown above. To access the pin listing, click on the Pins tab. Create a mirror image of a part on the same layer. Because a resistor’s pin does not have a unique polarity, you can Aug 10, 2018 · In Altium Designer, you can create your planes either as a negative (Internal) plane or as a positive plane (Polygon Pour). Dec 12, 2016 · To do this: Place the desired logo image (in BMP or PNG format) into a Microsoft Word document. Its PCB and Library Editors allow direct placement while laying down design specifications within layout. Click on New in the drop-down list for the Model Name. In V. The pin group is an attribute of each pin in the component and its value can be any alphanumeric string. The antenna is fed from an intermediate point a distance from the grounded end. Jan 12, 2023 · Select the required variant in the Variants section in the Projects panel by double-clicking on its entry or by on the desired variant and selecting the Set as current command. Silicon-controlled rectifier (SCR) optoisolators are a type of thyristor-based isolator designed for AC power control applications. Mar 9, 2018 · Access FPGA/MC data from the external pin file in Altium Designer: Right click on a schematic component part and select Pin Mapping from the context menu, which opens the Pin Mapper dialog. Once the swap groups have been defined, pin swapping, differential pair swapping, or sub-part swapping can be performed interactively within the PCB design process document. It brings comprehensive harness design support into the same environment as PCB and system design, removing the previous heavy reliance on third-party software. There are two types of lasers used in this process: May 20, 2018 · Parts in the PCB layout can be mirrored in two ways: Flip a part to the other layer of the PCB. Don't forget to cover any element you want visible as copper in the Top Solder layer using the same shapes. sjvgawriitsnoqzyzdsr